Investigation of Material and Geometric Effects on the Performance of Gate All Around Nanowire TFET and FET Devices

Abstract

Advancements in nanoscale technology have enabled lower operating voltages and reduced power consumption, but also increased leakage currents. This study explores the performance of Tunnel Field-Effect Transistors (TFETs) and Field-Effect Transistors (FETs) using gate-all-around (GAA) silicon nanowires (Si-NW), which offer improvements over traditional MOSFETs by reducing short channel effects. The optimized GAA NWTFETs achieved a significant reduction in threshold voltage (69.5%) and leakage current (6.39%), while enhancing ON current, subthreshold swing, and ON/OFF current ratio. Similarly, the optimized GAA NWFETs demonstrated a substantial reduction in leakage current (97.59%) and a dramatic improvement in the ON/OFF current ratio by 4611.97%. These results highlight the potential of GAA nanowire TFETs and FETs in advancing semiconductor technologies with improved performance and energy efficiency.